Gate statements begin on a new line with a gate name identifier, space, and a gate value expression. There are six value types that can be expressed:
Word | Alternative Words | Meaning | Syntax | Example | Explanation |
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Address | - | - | - |
rootFaculty.parentFac.childFac.theGate TODO or is it "topMostGate.lowerGate.lowestGate" ?I think it is the first one, but what is the second one? or is it an address too? I guess it is practically simply never used/required. |
The fully qualified path to a gate, relative to a certain Index. An address is represented by series circuits. |
Circuit | - | meaning | syntax |
A simple circuit called Nand ,
with 2 gates and 4 links:
Nand { and *binary.And not *binary.Not and:X = :X and:Y = :Y and:XAndY = not:Z not:NotZ = : } |
A circuit is the central unit of declaration in Escher. It specifies gates and links immediately contained within that (class of) circuit (no gates or links outside or inside its own gates). |
Default Valve |
gateX: (vector on gate gateX with the default valve): (vector on the super gate with the default valve)
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The valve denoted by the empty string "". You may think of it as the default input/output of a circuit. It has not special logic within Escher, other then not requiring to be named in code. |
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Directive | - | meaning | - |
materialize:
*fully.qualified.Name recall: @fully.qualified.Name
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A combination of a verb and an address. It means: "Do 'verb' with 'address'." |
Faculty | package? | meaning | - | - | Eschers word for a namespace; a group of escher source files in a single directory, respectively the circuits therein. |
Flow | - | - | - | - |
XXX (A synonym for Link?) TODO Should probably be renamed to Link See the go code of the circuit struct at circuit/circuit.go. |
Gate | Membrane? Brane? |
- | syntax |
A circuit with 7 gates:
alpha { directive1 *fully.qualified.Name directive2 @fully.qualified.Name integral 123 floating 3.14 complex (1-3i) quoted "abcd\n\tefgh" backQuoted |
An instantiation of a circuit inside an other circuit. Gates are the nodes of an Escher circuit, if interpreted as a graph. They are connected to each other by creating links between their valves. |
Index | - | meaning | - |
This exemplifies part of a typical index:
{ e { Alt (be.Materializer) Alternate (be.Materializer) Breakpoint (be.Materializer) Fork (be.Materializer) Grow (be.Materializer) Help (be.Materializer) Ignore (be.Materializer) ... } element { Docker (be.Materializer) Process (be.Materializer) } ... } |
An Escher index is a tree circuit, which we interpret as a an list containing the addresses to all gates. |
Link | Flow | - | syntax |
gateX:valveNo3 = gateY:valveNo2 :valveNo3 = gateX: |
A connection between two vectors. Links are the edges of an Escher circuit, if interpreted as a graph. |
Map | - | meaning | - |
ImplicitIntMap { *fully.qualified.Name 123 3.14 } ExplicitIntMap { 3 *fully.qualified.Name 6 @fully.qualified.Name 1 123 } StringMap { directive *fully.qualified.Name integral 123 floating 3.14 } MixedMap { directive *fully.qualified.Name 1 123 2 3.14 } |
A circuit with the limitation that it has no links. While we might think of a general circuit more of as a set of instructions plus data, a map is rather purely data. It maps keys of type int or string to arbitrary values,
quite like maps in other programming languages.
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materialize | - | - | - |
*fully.qualified.Name or *{ fully qualified Name } |
TODO |
Name | - | - | - | - |
The name part of a gate.
Each gate is comprised of a name and a value.
A name can be any string without spaces,
but in practise you probably want to limit it more,
say to a common definition of a variable name as found in many other languages,
for example using the regex: [a-zA-Z0-9_]+
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Program | runnable?, executable circuit? | meaning | - |
See any of the *Main circuits in the
Escher tutorials
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Programs are circuits that describe executable systems. |
recall | - | - | - |
@fully.qualified.Name or @{ fully qualified Name } |
TODO |
Series | meaning | syntax |
implicit series:
alpha { *fully.qualified.Name @fully.qualified.Name 123 3.14 (1-3i) "abcd\n\tefgh"which is equivalent to this explicit series: alpha { 0 *fully.qualified.Name 1 @fully.qualified.Name 2 123 3 3.14 4 (1-3i) 5 "abcd\n\tefgh" 6 |
A series is a map with the additional restrictions that:
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Super Gate | super-membrane super-brane |
- | - |
:valveNo3 (vector with valve valveNo3 on the super gate): (vector with default valve on the super gate)
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The empty-string named gate is called the super gate. While one cannot assign a value to it through syntax, it is possible to connect links to it. When materializing, the links connected to the super gate are exposed to the higher-level/enclosing/“super” circuit. |
Tree | - | meaning | - |
Tree { Trunk { Branches { "Johnny" "Katie" } } Root { Tentacles { "Grandpa" "Grandma" } } } |
A recursive structure of maps, where maps can contain other maps. |
Value | - | - | - |
SomeCircuit { directive1 *fully.qualified.Name directive2 @fully.qualified.Name integral 123 floating 3.14 complex (1-3i) quoted "abcd\n\tefgh" backQuoted |
The value part of a gate.
Each gate is comprised of a name and a value. FIXME Some point of the documentation says, the value cna be any Go value, while an other part states, that it can be one of Integer, Float, complex-number, string, directive or circuit. Both can't be true. |
Valve | I/O whole/connector | - | - | - | An input and-or output "connector" between the inside and the outside of a gate. It has a unique name within the circuit it is declared. It can be connected to at most one other valve (of the same gate or an other) using a link. |
Vector | valve-ID? | - | - |
gateX:valveNo3 :valveNo3 gateX: :
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A qualified valve, consisting of a gate-name
and one of its valves names, separated with a ":" .If the gate is being omitted, the vector refers to the super gte. If the valve is being omitted, the vector refers to the default valve. |
Verb | instruction? | - | - |
* or @
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Can be either "*" (materialize)
or "@" (recall),
and is the first part of a directive.
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